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19-2213; Rev 0; 10/01
Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package
General Description
The MAX9155 is a low-voltage differential signaling (LVDS) repeater, which accepts a single LVDS input and duplicates the signal at a single LVDS output. Its low-jitter, low-noise performance makes it ideal for buffering LVDS signals sent over long distances or noisy environments, such as cables and backplanes. The MAX9155's tiny size makes it especially suitable for minimizing stub lengths in multidrop backplane applications. The SC70 package (half the size of a SOT23) allows the MAX9155 to be placed close to the connector, thereby minimizing stub lengths and reflections on the bus. The point-to-point connection between the MAX9155 output and the destination IC, such as an FPGA or ASIC, allows the destination IC to be located at greater distances from the bus connector. Ultra-low, 23ps p-p added deterministic jitter and 0.6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-anddata recovery, PLLs, serializers, or deserializers. The MAX9155's switching performance guarantees a 200Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time. The MAX9155 has fail-safe circuitry that sets the output high for undriven open, short, or terminated inputs. The MAX9155 operates from a single +3.3V supply and consumes only 10mA over a -40C to +85C temperature range. Refer to the MAX9129 data sheet for a quad bus LVDS driver, and to the MAX9156 data sheet for a low-jitter, low-noise LVPECL-to-LVDS level translator in an SC70 package. o Tiny SC70 Package o Ultra-Low Jitter 23psp-p Added Deterministic Jitter (223-1 PRBS) 0.6psRMS Added Random Jitter o 0.5ns (min) Transition Time Minimizes Radiated Noise o 200Mbps Guaranteed Data Rate o Fail-Safe Circuit Sets Output High for Undriven Inputs (Open, Terminated, or Shorted) o Low 10mA Supply Current o Low 6mA Supply Current in Fail-Safe o Conforms to ANSI/EIA/TIA-644 LVDS Standard o High-Impedance Inputs and Outputs in Power-Down Mode
Features
MAX9155
Ordering Information
PART MAX9155EXT-T TEMP. RANGE -40C to +85C PINPACKAGE 6 SC70-6 TOP MARK ABC
Applications
Cellular Phone Base Stations DSLAMs Digital Cross-Connects Add/Drop Muxes Network Switches/Routers Multidrop Buses Cable Repeaters
IN- 3 GND 2
Pin Configuration
TOP VIEW
MAX9155
OUT- 1 6 OUT+
5
VCC
4
IN+
Typical Operating Circuit appears at end of data sheet.
SC70
________________________________________________________________ Maxim Integrated Products
1
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package MAX9155
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +4.0V IN+, IN- to GND.....................................................-0.3V to +4.0V OUT+, OUT- to GND .............................................-0.3V to +4.0V Short-Circuit Duration (OUT+, OUT-) .........................Continuous Continuous Power Dissipation (TA = +70C) 6-Pin SC70 (derate 3.1mW/C above +70C) ..............245mW Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Operating Temperature Range ...........................-40C to +85C ESD Protection Human Body Model, IN+, IN-, OUT+, OUT- ....................8kV Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, RL = 100 1%, |VID| = 0.05V to 1.2V, VCM = |VID / 2| to 2.4V - |VID / 2|, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Notes 1, 2)
PARAMETER LVDS INPUT Differential Input High Threshold Differential Input Low Threshold Input Current Power-Off Input Current Input Resistor 1 Input Resistor 2 LVDS OUTPUT Differential Output Voltage Change in VOD Between Complementary Output States Offset (Common-Mode) Voltage Change in VOS for Complementary Output States Output High Voltage Output Low Voltage Fail-Safe Differential Output Voltage Power-Off Output Leakage Current Differential Output Resistance Output Short Current POWER SUPPLY Supply Current Supply Current in Fail-Safe ICC ICCF Output loaded Output loaded, input undriven 10 6 15 8 mA mA VOD VOD VOS VOS VOH VOL VOD+ IOOFF RODIFF ISC IN+, IN- shorted, open, or parallel terminated VCC = 0 OUT+ = 3.6V, other output open OUT- = 3.6V, other output open 0.9 +250 -10 -10 100 Figure 2 Figure 2 Figure 2 Figure 2 1.125 250 360 0.008 1.25 0.005 1.44 1.08 +360 0.02 0.02 260 -5 -5 +450 10 10 400 -15 -15 450 25 1.375 25 1.6 mV mV V mV V V mV A mA VTH VTL IIN+, IINIIN+, IINRIN1 RIN2 0.05V |VID| 0.6V 0.6V< |VID| 1.2V, 0.05V |VID| 0.6V, VCC = 0 0.6V < |VID| 1.2V, VCC = 0 VCC = +3.6V or 0, Figure 1 VCC = +3.6V or 0, Figure 1 -50 -15 -20 -15 -20 67 267 7 -7 -2.5 -3.5 1.3 2.6 232 1174 15 20 15 20 50 mV mV A A k k SYMBOL CONDITIONS MIN TYP MAX UNITS
VCC = +3.6V or 0 VID = +50mV, OUT+ = GND VID = -50mV, OUT- = GND
2
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, RL = 100 1%, CL = 10pF, |VID| = 0.15V to 1.2V, VCM = |VID / 2| to 2.4V - |VID / 2|, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Notes 3, 4, 5) (Figures 3, 4)
PARAMETER Differential Propagation Delay High to Low Differential Propagation Delay Low to High Added Deterministic Jitter (Notes 6, 11) Added Random Jitter (Notes 7, 11) Differential Part-to-Part Skew (Note 8) Differential Part-to-Part Skew (Note 9) Switching Supply Current Rise Time Fall Time Input Frequency (Note 10) SYMBOL tPHLD tPLHD tDJ tRJ tSKPP1 tSKPP2 ICCSW tTLH tTHL fMAX 0.5 0.5 100 11.3 0.66 0.64 200Mbps 223-1 PRBS data pattern fIN = 100MHz CONDITIONS MIN 1.3 1.3 TYP 2.0 2.0 23 0.6 0.17 MAX 2.8 2.8 100 2.9 0.6 1.5 18 1.0 1.0 UNITS ns ns psp-p psRMS ns ns mA ns ns MHz
MAX9155
Note 1: All devices are 100% tested at TA = +25C. Limits over temperature are guaranteed by design and characterization. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground except VTH, VTL, VOD, and VOD. Note 3: Guaranteed by design and characterization. Note 4: Signal generator output (unless otherwise noted): frequency = 100MHz, 50% duty cycle, RO = 50, tR = 1.5ns, and tF = 1.5ns (0% to 100%). Note 5: CL includes scope probe and test jig capacitance. Note 6: Signal generator output for tDJ: VOD = 150mV, VOS = 1.2V, tDJ includes pulse (duty-cycle) skew. Note 7: Signal generator output for tRJ: VOD = 150mV, VOS = 1.2V. Note 8: tSKPP1 is the magnitude difference of any differential propagation delays between devices operating over rated conditions at the same supply voltage, input common-mode voltage, and ambient temperature. Note 9: tSKPP2 is the magnitude difference of any differential propagation delays between devices operating over rated conditions. Note 10: Device meets VOD DC specification and AC specifications while operating at fMAX. Note 11: Jitter added to the input signal.
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package MAX9155
Typical Operating Characteristics
(VCC = +3.3V, RL = 100 1%, CL = 10pF, |VID| = 0.2V, VCM = 1.2V, TA = +25C, unless otherwise noted. Signal generator output: frequency = 100MHz, 50% duty cycle, RO = 50, tR = 1.5ns, and tF = 1.5ns (0% to 100%), unless otherwise noted.)
SUPPLY CURRENT
VS. INPUT FREQUENCY
MAX9155 toc01
SWITCHING SUPPLY CURRENT VS. TEMPERATURE
MAX9155 toc02
OUTPUT SHORT-CIRCUIT CURRENT VS. SUPPLY VOLTAGE
OUTPUT SHORT-CIRCUIT CURRENT (mA)
MAX9155 toc03
21 18 SUPPLY CURRENT (mA) 15 12 9 6 3 0 0
12.00 11.75 SUPPLY CURRENT (mA) 11.50 11.25 11.00 10.75 10.50 10.25 10.00
5.10
5.09
5.08
5.07
5.06
5.05 -40 -15 10 35 60 85 3.0 3.1 3.2 3.3 3.4 3.5 3.6 TEMPERATURE (C) SUPPLY VOLTAGE (V)
25 50 75 100 125 150 175 200 225 250 INPUT FREQUENCY (MHz)
FAIL-SAFE SUPPLY CURRENT VS. SUPPLY VOLTAGE
MAX9155 toc04
OUTPUT LOW VOLTAGE VS. SUPPLY VOLTAGE
MAX9155 toc05
OUTPUT HIGH VOLTAGE VS. SUPPLY VOLTAGE
1.525 OUTPUT HIGH VOLTAGE (V) 1.500 1.475 1.450 1.425 1.400 1.375 1.350
MAX9155 toc06
6.5
1.12 1.11 OUTPUT LOW VOLTAGE (V) 1.10 1.09 1.08 1.07 1.06
1.550
6.3 SUPPLY CURRENT (mA)
6.1
5.9
5.7
5.5 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V)
1.05 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V)
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY VS. SUPPLY VOLTAGE
MAX9155 toc07
DIFFERENTIAL PROPAGATION DELAY VS. TEMPERATURE
MAX9155 toc08
TRANSITION TIME
VS. SUPPLY VOLTAGE tTHL 725 TRANSITION TIME (ps) 700 675 650 625 600 575 tTLH
MAX9155 toc09
2.1 DIFFERENTIAL PROPAGATION DELAY (ns) tPHLD 2.0
2.5 DIFFERENTIAL PROPAGATION DELAY (ns)
750
2.3
2.1
1.9
tPLHD
tPHLD
1.9 tPLHD 1.7
1.8
1.7 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V)
1.5 -40 -15 10 35 60 85 TEMPERATURE (C)
550 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V)
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package MAX9155
Typical Operating Characteristics (continued)
(VCC = +3.3V, RL = 100 1%, CL = 10pF, |VID| = 0.2V, VCM = 1.2V, TA = +25C, unless otherwise noted. Signal generator output: frequency = 100MHz, 50% duty cycle, RO = 50, tR = 1.5ns, and tF = 1.5ns (0% to 100%), unless otherwise noted.)
TRANSITION TIME
VS. TEMPERATURE
MAX9155 toc10
DIFFERENTIAL OUTPUT VOLTAGE VS. LOAD RESISTOR
DIFFERENTIAL OUTPUT VOLTAGE (mV)
MAX9155 toc11
800 750 TRANSITION TIME (ps) 700 650 600 550 500 450 400 -40 -15 10 35 60 tTLH, tTHL
600 500 400 300 200 100 0
85
25
50
75
100
125
150
TEMPERATURE (C)
LOAD RESISTOR ()
Pin Description
PIN 1 2 3 4 5 6 NAME OUTGND ININ+ VCC OUT+ Ground Inverting LVDS Input Noninverting LVDS Input Power Supply. Bypass VCC to GND with 0.01F ceramic capacitor. Noninverting LVDS Output FUNCTION Inverting LVDS Output
Detailed Description
The LVDS interface standard is a signaling method intended for point-to-point communication over a controlled-impedance medium, as defined by the ANSI/ TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower voltage swing than other common communication standards, achieving higher data rates with reduced power consumption while reducing EMI emissions and system susceptibility to noise. The MAX9155 is a 200Mbps LVDS repeater intended for high-speed, point-to-point, low-power applications. The MAX9155 accepts an LVDS input and reproduces an LVDS signal at the output. This device is capable of detecting differential signals as low as 50mV and as high as 1.2V within a 0 to 2.4V input voltage range. The LVDS standard specifies an input voltage range of 0 to 2.4V referenced to ground.
Table 1. Function Table for LVDS Fail-Safe Input (Figure 2)
INPUT, VID > 50mV < -50mV 50mV > VID > -50mV Undriven open, short, or terminated OUTPUT, VOD High Low Indeterminate High
Fail-Safe
Fail-safe is a feature that puts the output in a known logic state (differential high) under certain fault conditions. The MAX9155 outputs are differential high when the inputs are undriven and open, terminated, or shorted (Table 1).
Note: VID = (IN+ - IN-), VOD = (OUT+ - OUT-) High = 450mV VOD 250mV Low = -250mV VOD -450mV
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package MAX9155
Applications Information
Supply Bypassing
Bypass V CC with a high-frequency surface-mount ceramic 0.01F capacitor as close to the device as possible.
Termination
For point-to-point links, the termination resistor should be located at the LVDS receiver input and match the differential characteristic impedance of the transmission line. For a multidrop bus driven at one end, terminate at the other end of the bus with a resistor that matches the loaded differential characteristic impedance of the bus. For a multidrop bus driven from a point other than the end, terminate each end of the bus with a resistor that matches the loaded differential characteristic impedance of the bus. When terminating at both ends, or for a large number of drops, a bus LVDS (BLVDS) driver is needed to drive the bus to LVDS signal levels. The MAX9155 is not intended to drive double-terminated multidrop buses to LVDS levels. The differential output voltage level depends upon the differential characteristic impedance of the interconnect and the value of the termination resistance. The MAX9155 is guaranteed to produce LVDS output levels into 100. With the typical 3.6mA output current, the MAX9155 produces an output voltage of 360mV when driving a 100 transmission line terminated with a 100 termination resistor (3.6mA x 100 = 360mV). For typical output levels with different loads, see the Differential Output Voltage vs. Load Resistor typical operating curve.
Differential Traces
Input and output trace characteristics affect the performance of the MAX9155. Use controlled-impedance differential traces. Ensure that noise couples as common mode by running the traces within a differential pair close together. Maintain the distance within a differential pair to avoid discontinuities in differential impedance. Avoid 90 turns and minimize the number of vias to further prevent impedance discontinuities.
Cables and Connectors
The LVDS standards define signal levels for interconnect with a differential characteristic impedance and termination of 100. Interconnects with a characteristic impedance and termination of 90 to 132 impedance are allowed, but produce different signal levels (see Termination). Use cables and connectors that have matched differential impedance to minimize impedance discontinuities. Avoid the use of unbalanced cables, such as ribbon or coaxial cable. Balanced cables, such as twisted pair, offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables tend to pick up noise as common mode, which is rejected by the LVDS receiver.
Chip Information
TRANSISTOR COUNT: 401 PROCESS: CMOS
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package
Test Circuit and Timing Diagrams
VCC CL RIN2 PULSE GENERATOR IN+ INRL
MAX9155
OUT+
IN+ RIN1/2
VCC - 0.3V
50 OUT+ OUT-
50 OUTCL
RIN1/2 IN-
Figure 3. Transition Time and Propagation Delay Test Circuit
Figure 1. LVDS Fail-Safe Input
OUT+
1.25V 1.20V 1.25V 1.20V
IN+ INVOD
RL/2
VOS RL/2 OUT-
Figure 2. DC Load Test Circuit
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package MAX9155
Test Circuit and Timing Diagrams (continued)
VCM = ((IN+) + (IN-))/2 O (DIFFERENTIAL) IN+ tPLHD OUTO (DIFFERENTIAL) OUT+ O (DIFFERENTIAL) tPHLD VID O (DIFFERENTIAL)
IN-
80% O (DIFFERENTIAL)
80% O (DIFFERENTIAL)
20% VDIFF tTLH
VDIFF = (OUT+) - (OUT-) tTHL
20%
Figure 4. Transition Time and Propagation Delay Timing Diagram
Typical Operating Circuit
1/4 MAX9129
1/4 MAX9121
1/4 MAX9121
100
100
MAX9155
MAX9155
STUB WITHOUT REPEATER
STUB WITH REPEATER
REPEATERS REDUCE ASIC OR FPGA STUB LENGTH ON A MULTIDROP BUS.
8
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Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package
Package Information
SC70, 6L.EPS
MAX9155
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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